TABLE OF CONTENTS - LEARN HARDWARE FIRMWARE AND SOFTWARE DESIGN

LEARN HARDWARE FIRMWARE AND SOFTWARE DESIGN 5TH EDITION - FRONT COVER

TABLE OF CONTENTS 3
REQUIREMENTS 7
LITTLE HISTORY 14

LH1: OF HARDWARE 14
LH2: OF FIRMWARE 16
LH3: OF SOFTWARE – BEGINNINGS 19
LH4: OF SOFTWARE – ONGOING DEVELOPMENTS 20
LH5: OF SOFTWARE – CONCLUSIONS 23

PART 1: HARDWARE DESIGN

H1: ABOUT HARDWARE DESIGN 27
H1.1 COMPARISON: LOGIC HARDWARE VS. ANALOG ELECTRONICS 27
H1.2 TYPES OF LOGIC ICS 28
H1.3 FAMILIES OF STANDARD LOGIC ICS 29
H1.4 MICROCONTROLLER HARDWARE DESIGN 30
H1.5 PGA HARDWARE DESIGN 32
H1.6 ASIC HARDWARE DESIGN 32
H1.7 ABOUT PLC HARDWARE DESIGN 33

H2: DIGITAL COMPONENTS 34
H2.1 PASSIVE COMPONENTS: RESISTORS 34
H2.2 PASSIVE COMPONENTS: CAPACITORS 38
H2.3 PASSIVE COMPONENTS: INDUCTORS 40
H2.4 PASSIVE COMPONENTS: SWITCHES AND CONNECTORS 41
H2.5 ACTIVE COMPONENTS: DIODES 42
H2.6 ACTIVE COMPONENTS: TRANSISTORS 43
H2.7 MICROCONTROLLERS 46
H2.8 HARDWARE BINARY CODE 50
H2.9 USEFUL TIPS IN HARDWARE DESIGN 50
H2.10 DARK SIDE OF HARDWARE DESIGN 51

H3: MICROCONTROLLER DESIGN 53
H3.1 MICROCONTROLLER DATASHEET – SPECIFICATIONS 53
H3.2 MICROCONTROLLER PORTS 55
H3.3 PRICES AND FOOTPRINTS CONSIDERATIONS 58
H3.4 SUGGESTED TASKS 59

H4: MANDATORY HARDWARE MODULES 60
H4.1 OSCILLATOR CIRCUITS 60
H4.1.1 OPTIONS OF OSCILLATOR CIRCUITS 61
H4.1.2 CUT–CRYSTAL OSCILLATOR CIRCUIT 62
H4.1.3 CERAMIC RESONATOR OSCILLATOR CIRCUIT 63
H4.1.4 SUGGESTED TASKS 65
H4.2 POWER SUPPLY 66
H4.2.1 VOLTAGE REGULATORS 66
H4.2.2 ANALOG AND DIGITAL POWER SUPPLY CIRCUITS 68
H4.2.3 SUGGESTED TASKS 70
H4.3 PROGRAMMING INTERFACE 71
H4.3.1 ICSP MPLAB® ICD3 71
H4.3.2 SUGGESTED TASKS 74

H5: COMMUNICATIONS MODULES 75
H5.1 UART2–RS232 MODULE 75
H5.1.1 RS232 HARDWARE PROTOCOL 76
H5.1.2 UART2-RS232 DRIVER MODULE 77
H5.1.3 CUSTOM RS232 DRIVER MODULE 80
H5.1.4 SUGGESTED TASKS 82
H5.2 SPI MODULE 83
H5.2.1 SPI BUS 84
H5.2.2 CUSTOM-BUILT SPI BUS MODULE 86
H5.2.3 SUGGESTED TASKS 87

H6: DIGITAL I/O PORTS 89
H6.1 DISCRETE DIGITAL INPUTS 89
H6.2 SERIALIZED DIGITAL INPUTS 90
H6.3 DISCRETE DIGITAL OUTPUTS 93
H6.4 SERIALIZED DIGITAL OUTPUTS 94
H6.5 SUGGESTED TASKS 97

H7: ANALOG CHANNELS 100
H7.1 ANALOG TO DIGITAL CONVERSION 100
H7.2 A/D INPUT CHANNELS 102
H7.3 SUGGESTED TASKS 104

H8: DIGITAL DISPLAY MODULES 105
H8.1 BARGRAPH MODULE 106
H8.2 SEVEN-SEGMENTS DISPLAY MODULE 109
H8.3 SUGGESTED TASKS 112

H9: STEPPER DRIVER MODULE 113
H9.1 STEPPER MOTORS 113
H9.2 STEPPER DRIVER MODULE 114
H9.3 SUGGESTED TASKS 117

H10: PCB DESIGN 118
H10.1 LHFSD-HCK PCB IMPLEMENTATION 119
H10.2 BILL OF MATERIALS 122
H10.3 SUGGESTED TASKS 124

H11: RECOMMENDED PRACTICE IN HARDWARE DESIGN 126
H11.1 DESIGNING MICROCONTROLLER HARDWARE 126
H11.1 TESTING HARDWARE 127

GREEN LEAVES
LHFSD - Front Cover

PART 2: FIRMWARE DESIGN

F1: FIRMWARE DEVELOPMENT ENVIRONMENT 130
F1.1 FIRMWARE DEVELOPMENT WORKFLOW 131
F1.2 FIRMWARE WORKBENCH SETUP 132
F1.2.1 TASK 1 – DECIDING ON THE OPERATING SYSTEM TO USE 132
F1.2.2 TASK 2 – INSTALLING MPLAB® IDE 134
F1.2.3 TASK 3 – INSTALLING USB DRIVER 134
F1.2.4 TASK 4 – INSTALLING “LANGUAGE TOOLSUITE/TOOLCHAIN” 135
F1.3 FIRMWARE DOCUMENTATION 136
F1.4 FIRST FIRMWARE PROJECT – “TEST1” 136
F1.4.1 STEP 1 – ASSEMBLING PROJECT FILES 137
F1.4.2 STEP 2 – ADDING “TEST1” SOURCE-CODE FILE 139
F1.4.3 STEP 3 – HARDCODING THE CONFIGURATION BITS 141
F1.4.4 STEP 4 – BUILDING AND RUNNING PROJECT “TEST1” 143
F1.5 SUGGESTED TASKS 146

F2: PROJECT FD1 – COMPILING MULTIPLE FILES PROJECTS 147
F2.1 XC16 GNU GCC COMPILER/LINKER LIMITATIONS 147
F2.2 PROJECT FD1 150
F2.3 FILE “UTILITIES.H” 152
F2.4 FILE “DATA.H” 158
F2.5 FILE “CONFIGS.H” 161
F2.6 SOURCE-CODE FILE “MAIN.C” 163
F2.7 WORKING WITH FILE “P30F4011.H” 165
F2.8 MPLAB® X IDE V2.2 USEFUL CONTROLS 166
F2.9 TESTING PROJECT FD1 170
F2.10 CONSIDERATIONS ON FIRMWARE PROGRAMMING 170
F2.11 SUGGESTED TASKS 172

F3: PROJECT FD2 – REAL TIME MULTITASKING 173
F3.1 MICROCONTROLLER TIME MANAGEMENT 173
F3.2 PROGRAMMING WITH INTERRUPTS 175
F3.3 FILE “TIMERS.H” 175
F3.4 FILE “INTERRUPTS.H” 178
F3.5 FILE “MAIN.C” 180
F3.6 SUGGESTED TASKS 182

F4: PROJECT FD3 – I/O MODULE AND SPI COMMUNICATIONS 183
F4.1 FILE “IO.H” 183
F4.2 FILE “SPI.H” – PISO MODULE 186
F4.3 FILE “SPI.H” – DAC MODULE 189
F4.4 FILE “SPI.H” – SIPO MODULE 191
F4.5 SUGGESTED TASKS 197

F5: PROJECT FD4A – PROCESSING ANALOG CHANNELS 198
F5.1 FILE “AD.H” 198
F5.2 “EXTERNAL INTERRUPT” MODULE 203
F5.3 WORKING WITH TIMERS 2 AND 3 IN “TIMER MODE” 204
F5.4 PROJECT FD4B – USING TIMER4 IN “COUNTER MODE” 212
F5.5 SUGGESTED TASKS 217

F6: PROJECT FD5 – RS232 COMMUNICATIONS 218
F6.1 RS232 FIRMWARE PROTOCOL 218
F6.2 CONFIGURING USB/RS232 PC INTERFACE 220
F6.3 RS232 FIRMWARE DRIVER – FILE “RS232.H” 224
F6.4 SUGGESTED TASKS 227

F7: PROJECT FD6 – DRIVING STEPPER MOTORS 229
F7.1 UNIPOLAR AND BIPOLAR STEPPER MOTORS 229
F7.2 FILE “STEP.H” 230
F7.3 END OF PART 2 FIRMWARE DESIGN 236
F7.4 SUGGESTED TASKS 236
 
LHFSD - Front Cover
PART 3: SOFTWARE DESIGN

S1: SOFTWARE CONTROL OVER FIRMWARE AND HARDWARE 238
S1.1 ABOUT OBJECT ORIENTED PROGRAMMING 239
S1.2 WHY “SIMILAR TO” VISUAL BASIC 6? 240
S1.3 VISUAL BASIC 6 REFERENCE COMPILER 242
S1.4 PROJECT SD1 – HMI INTERFACE 246
S1.5 CUSTOMIZING PROJECT SD1 251
S1.6 SUGGESTED TASKS 259

S2: REAL TIME DATA DISPLAY 260
S2.1 ABOUT “MSCOMM” OBJECT 260
S2.2 PROJECT SD2 – SERIAL COMMUNICATIONS INTERFACE 261
S2.3 REAL TIME DATA DISPLAY – FIRMWARE PROJECT FD7 271
S2.4 REAL TIME DATA DISPLAY – SOFTWARE PROJECT SD3 275
S2.5 SUGGESTED TASKS 279

S3: PROJECT SD4 – DATA MANAGEMENT 281
S3.1 DESIGNING FOR DATA MANAGEMENT 281
S3.2 DATA MANAGEMENT IN FIRMWARE 284
S3.3 PROCESSING COMMANDS IN FIRMWARE 289
S3.4 PROCESSING COMMANDS IN SOFTWARE 291
S3.5 SUGGESTED TASKS 301

S4: PROJECT SD5 – CONTROL OBJECTS 303
S4.1 GRAPHIC CONTROLS 304
S4.2 SERIAL BINARY FIRMWARE DRIVER 306
S4.3 SERIAL BINARY SOFTWARE DRIVER 310
S4.4 MSFLEXGRID CONTROL 319
S4.5 SUGGESTED TASKS 324

S5: PROJECT SD6 – FILE MANAGEMENT 326
S5.1 CREATING PC FILES IN SOFTWARE 327
S5.2 SENDING A FILE FROM PC TO LHFSD-HCK 334
S5.3 SENDING A FILE FROM LHFSD-HCK TO PC 344
S5.4 SUGGESTED TASKS 350

S6: PROJECT SD7 – “GRAPH TRACE” 351
S6.1 GRAPHIC ANALOG DISPLAY 351
S6.2 SUGGESTED TASKS 359

S7: DEPLOYABLE “LHFSD.EXE” 362
S7.1 PACKAGING AND DEPLOYMENT OF “LHFSD.EXE” 362
S7.2 GENERAL CONSIDERATIONS ON SOFTWARE DEVELOPMENT 369
S7.3 FINAL WORD 370

DOWNLOADING SOURCE-CODE PACKAGE “ED5RV07EN-15” 372
BIBLIOGRAPHY 373
AP1: RESISTOR COLOR CODE 374
AP2: STANDARD LOGIC ICS 375

 


LHFSD - Front Cover






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Page last updated on: November 26, 2023
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